OpenFive is a solution-centric silicon company that is uniquely positioned to design processor agnostic SoC architectures with customizable and differentiated IP for artificial intelligence, edge computing, HPC, and networking solutions.OpenFiveoffers end-to-end expertise in architecture, design implementation, software, silicon validation and manufacturing to deliver high-quality silicon.
OpenFive is a solution-centric silicon company that is uniquely positioned to design processor agnostic SoC architectures with customizable and differentiated IP for artificial intelligence, edge computing, HPC, and networking solutions. OpenFive develops domain-specific SoC architecture based on high-performance, highly-efficient, cost-efficient IP to deliver scalable, optimized, differentiated silicon. OpenFiveoffers end-to-end expertise in architecture, design implementation, software, silicon validation and manufacturing for semiconductor companies and systems manufacturers.
Work very closely with ASIC IP vendors and customers across the world in defining, qualifying and integrating the IPs for different applications
Work with program and delivery managers to oversee the IPs through the lifecycle of the project
Provide product and technical support to internal/external engineering teams on the integration and usage of IPs
Generate IP application notes and checklists for different IPs being used in a design
Manage various IP deliverables to design team and customers
Contribute to the improvement of IP QA flow by adding more checks/checklists to the process
Participate in meetings with customers and manage the IP programs for the assigned projects
Support the pre-sales team on technical inputs for IP solutions
Generate and review circuit design specs and participate in the circuit development of analog/mixed signal blocks going into memory PHYs and/or SerDes with the IP vendors
Minimum 5+ years of experience in circuit design
Experience in semiconductor IP/library design or application engineering for cell libraries, embedded memories (SRAMs, TCAMs), IOs, DDRx/PCIe/USB/MIPI PHYs/high speed SerDes, analog blocks, ARM cores, system interconnects/peripherals, etc.
Experience in the circuit/layout design of IPs is preferred
Experience in analog /mixed signal circuit design and/or DDRX PHYs/SerDes
Experience running signal and power integrity in channel simulations
Must be a team player and a fast learner who is open to new ideas
Possess strong written and verbal communications skills
Must be able to travel internationally
Hold a bachelor’s degree or equivalent in electronics engineering, computer science, or closely-related field – MSEE is preferred