OpenFive is a solution-centric silicon company that is uniquely positioned to design processor agnostic SoC architectures with customizable and differentiated IP for artificial intelligence, edge computing, HPC, and networking solutions.OpenFiveoffers end-to-end expertise in architecture, design implementation, software, silicon validation and manufacturing to deliver high-quality silicon.
Senior Analog Ciruit Design Engineer – Bangalore, India
OpenFive is a solution-centric silicon company that is uniquely positioned to design processor
agnostic SoC architectures with customizable and differentiated IP for artificial intelligence, edge
computing, HPC, and networking solutions. OpenFive develops domain-specific SoC
architecture based on high-performance, highly-efficient, cost-efficient IP to deliver scalable,
optimized, differentiated silicon. OpenFive offers end-to-end expertise in architecture, design
implementation, software, silicon validation and manufacturing for semiconductor companies
and systems manufacturers.
Responsibilities :
HBM2E SoC analog sub-block design such as DLL, PLL, HBMIO, Clktree, VCDL and DCC
Block-level architecture selection as per specs
Design and simulation across pvt to meet specs
Help in .lib generation and support review
Post-layout simulations
Help in Verilog code generation for block owned and validate with schematic
Signoff on collaterals
Requirements:
Minimum 4 years of experience in analog circuit design
Skilled at basics and device physics, with understanding of the following:
Current mirrors, bandgap reference, Opamp, common source amplifier small signal analysis andvarious topologies
Hands-on wrt of each block
Basics of design constraints, current mirror matching, Opamp types and circuit design, comparator circuit design, bgref circuit design, level shifter circuit design, GPIO driver, pre-driver full custom circuit design, Tx/Rx constraints understanding
Basic knowledge of the following layouts: antenna checks, antenna failure, latchup issues, ESD constraints and layout rules, ERC related checks, matching, cross talk, coupling, shielding, guard ring usage, LEF generation, .lib characterization, extraction setup, drclvs runs switch knowledge, IR drop requirements, EM issues, parasitic matching , parasitic reduction techniques, and static and dynamic IR analysis
Completed at least one of the following circuit designs >1GHz speed: DLL full circuit design, PLL full chip circuit design, or LVDS/USB/DDR/HBM Full Chip circuit design
Experience in ADC/DAC circuit design is a plus
Experience in SerDes circuit design is a plus
Please email your resume along with a covering letter to careers.india@openfive.com and also mention the job location.