OpenFive

OpenFive is a solution-centric silicon company that is uniquely positioned to design processor agnostic SoC architectures with customizable and differentiated IP for artificial intelligence, edge computing, HPC, and networking solutions.OpenFiveoffers end-to-end expertise in architecture, design implementation, software, silicon validation and manufacturing to deliver high-quality silicon.

Press Releases

Alphawave IP Achieves Its First Testchip Tapeout for TSMC N3E Process

New SerDes solution to be presented at the TSMC 2022 Open Innovation Platform (OIP) this month in Santa Clara, CA. LONDON and TORONTO, Oct. 24, 2022 /PRNewswire/ – Alphawave IP (LSE: AWE), a global leader in high-speed connectivity for the world’s technology infrastructure, today announced the successful tapeout of its ZeusCORE100® 1-112Gbps NRZ/PAM4 Serialiser-Deserialiser (“SerDes”), Alphawave’s first testchip on TSMC’s most advanced N3E process.  Alphawave IP will be exhibiting this

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October 24, 2022

Alphawave IP Announces Completion of Acquisition of OpenFive.

Alphawave IP Announces Completion of Acquisition of OpenFive. Combined company will accelerate Alphawave’s leadership, product offerings and customer base while driving greater scale and revenue growth from an expanded total addressable market. LONDON, United Kingdom and; TORONTO, Ontario, CANADA September 1, 2022 – Alphawave IP Group plc (“Alphawave” or “Company”) (LN:AWE), a global leader in high-speed connectivity for the world’s technology infrastructure is pleased to

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September 1, 2022

OpenFive Joins Universal Chiplet Interconnect Express (UCIe) Consortium

OpenFive Joins Universal Chiplet Interconnect Express (UCIe) Consortium OpenFive brings depth of chiplet ecosystem experience from multiple customer engagements MILPITAS, Calif.–(BUSINESS WIRE)–, June 15, 2022 —OpenFive, a leading provider of custom silicon solutions with differentiated IP, today announced that the company has joined the Universal Chiplet Interconnect Express (UCIe) Consortium as it continues to contribute to open industry standards and ecosystems that accelerate deployment of

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June 16, 2022

OpenFive and EdgeCortix collaborate on an AI accelerator Custom SoC

OpenFive and EdgeCortix collaborate on an AI accelerator Custom SoC Collaborating to bring to market a new high performance and low power edge AI processor. MILPITAS, Calif., March 07, 2022–(BUSINESS WIRE)–EdgeCortix® Inc., the AI-focused fabless semiconductor company that enables best-in-class power-efficiency with near cloud-level performance across infrastructure and embedded edge devices, and OpenFive, a leading provider of custom silicon solutions with differentiated IP, today announced

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March 7, 2022

OpenFive Tapes Out SoC for Advanced HPC/AI Solutions on TSMC 5nm Technology

OpenFive Tapes Out SoC for Advanced HPC/AI Solutions on TSMC 5nm Technology OpenFive HBM3 and Die-2-Die (D2D) interfaces combined with SiFive E76 RISC-V CPU core enable high performance chiplets and 2.5D based system-on-a-chip (SoC) designs. SAN MATEO, Calif. – April 13, 2021 – OpenFive, a leading provider of customizable, silicon-focused solutions with differentiated IP, today announced the successful tape out of a high-performance SoC on

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April 13, 2021

OpenFive Launches Die-to-Die Interface Solution for Chiplet Ecosystem

OpenFive Launches Die-to-Die Interface Solution for Chiplet Ecosystem Features IOs running at up to 16Gbps (effective throughput of ~1.75Tbps/mm) Features extremely low latency and <0.5pJ/bit offering best power performance benchmarks   SAN MATEO, Calif., April 5, 2021 – OpenFive, the leading provider of customizable, silicon-focused solutions with differentiated IP, today announced the launch of a Die-to-Die (D2D) PHY that complements the company’s existing D2D Controller

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April 5, 2021

SiPearl and Open-Silicon Research Collaborate to Accelerate Custom Silicon for High Performance Computing (HPC) Applications

Massive increase in HPC application performance and interconnect speeds with high bandwidth memories and highly integrated system-on-a-chip in a multi-chip package MAISONS-LAFFITTE, France – February 23, 2021 SiPearl, the company designing the high-performance, energy-efficient microprocessor for the European exascale supercomputer and Open-Silicon Research, the India based entity of OpenFive, a leading provider of custom silicon solutions with differentiated IP, today announced a multi-year joint collaboration

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February 23, 2021

OpenFive Licenses Flex Logix’s eFPGA to Develop a Low Power Communications SoC Requiring a Large eFPGA

EFLX eFPGA enables the development of communications ICs that are smaller, lighter and consume lower power than using traditional FPGAs  MOUNTAIN VIEW, Calif., Dec. 7, 2020  Flex Logix® Technologies, Inc., supplier of the fastest and most-efficient AI edge inference accelerator and the leading supplier of eFPGA IP, announced today that OpenFive, a leading provider of domain-specific custom silicon solutions with differentiated IP, has licensed the EFLXÒ eFPGA for use in a low power

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December 7, 2020

OpenFive and AnalogX to Provide Optimized Chip-to-Chip Interface IP Solutions

Interlaken C2C Controller IP from OpenFive and AXLinkIO SerDes IP from AnalogX achieves ultra-low latency and <1pJ/bit solution for a Tier-1 customer SAN MATEO, Calif., (BUSINESS WIRE) Oct 5, 2020  OpenFive, the leading provider of customizable, silicon-focused solutions with differentiated IP, along with AnalogX, a provider of SerDes interface IP, today announced a complete sub-system solution and implementation for Chip-to-Chip (C2C) interface with ultra-low latency and power.

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October 5, 2020

OpenFive Enhances Differentiated IP Portfolio with Die-to-Die Interface Controllers for HPC and Chiplet Markets

Die-to-Die IP portfolio targets chiplets and heterogeneous solutions to support monolithic and 2.5D based ASICs SAN MATEO, Calif., Aug. 20, 2020 OpenFive, the leading provider of customizable, silicon-focused solutions with differentiated IP, today announced the launch of a new Die-to-Die (D2D) interface IP portfolio to serve next-generation chipset based designs for Networking, HPC, and AI Markets. With recent advances in package technologies and the cost per area increase

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August 20, 2020

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