OpenFive is a solution-centric silicon company that is uniquely positioned to design processor agnostic SoC architectures with customizable and differentiated IP for artificial intelligence, edge computing, HPC, and networking solutions.OpenFiveoffers end-to-end expertise in architecture, design implementation, software, silicon validation and manufacturing to deliver high-quality silicon.
Senior Engineer II - Layout Design

Senior Engineer II - Layout Design


  • Lead layout design activity and manage delivery of high frequency mixed signal blocks/IPs.



  • Minimum 4 years of exp in Analog Layout.
  • Minimum education requirement is bachelor’s degree in Electrical Engineering.
  • Experience in handling blocks and macros layout towards successful, high-quality, and timely execution.
  • Experience with Cadence tools (Virtuoso) and Calibre verification tools like LVS, DRC, Extraction etc.
  • Excellent understanding of analog layout concepts and issues.
  • Experience with Finfet process and lower nodes like 3nm/5nm/7nm in TSMC foundry.
  • Understanding of low parasitic, high frequency design techniques.
  • Experience with multiple foundries in lower node.
  • SKILL scripting experience.


Soft-skills required:

  • Excellent verbal and written communication.
  • Strong analytical and debug skills
  • Strong priority-resolution capabilities
  • Working well in a team environment is imperative in this role.

Get in touch

Share your vision with the OpenFive Sales team to create a custom silicon solution that fits your needs.

ASIC Design Specs

With your design specification ready, the OpenFive team will help define the schedule and budget for your project.


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